Professor at Instituto Superior Técnico, University of Lisbon
Integrated Researcher at INESC-ID
Guilherme Paim
Guilherme Paim is an Assistant Professor at the University of Lisbon, Instituto Superior Técnico, Portugal. About his education, he received his degree in electronics engineering (Hons.) from UFPel (Universidade Federal de Pelotas), Brazil, 15′. He received his Ph.D. degree (summa cum laude) in Microelectronics from UFRGS (Universidade Federal do Rio Grande do Sul), Brazil, 21′. He developed part of his Ph.D. as a Researcher at the Karlsruhe Institute of Technology (KIT), Germany, in collaboration with the University of Stuttgart, Germany (19′-20′). He received the Best Ph.D. Thesis Award 2022 from the Brazilian Microelectronics Society (SBMicro). He also received the Honor Mention Ph.D. Thesis Award 2022 from the CAPES Brazilian funding agency. He was a Postdoc at the High-Performance Computing Architecture and Systems (HPCAS) research group of the INESC-ID, Lisbon, Portugal. Currently, he is a Postdoctoral Researcher with the MICAS Labs at KU Leuven, Belgium, working on artificial intelligence (AI) system-on-chip (SoC) design. He has been collaborating with several projects as EU H2020 CONVOLVE and ERC BINGO, CAPES/FCT ML-DSIV, and CAPES/PROBRAL ReACT. He also is a technical consultant for a microelectronics project funded by the Brazilian Ministry of Science, Technology & Innovation (MCTI). He has more than 90 research papers on Circuits & Systems. He serves as Review Editor of the Frontiers in Electronics and Frontiers in Imaging journals. He also has served as a reviewer in many top journals like IEEE TCAS-I, TCAS-II, TCSVT, TVLSI, TPDS, TETC, TNSRE, and TBioCAS. His research interests are cross-layer AI HW co-processors, energy-quality scalable VLSI design, approximate computing, and emerging technologies.
Website: gppaim.wordpress.com
Experience
Assistant Professor
Instituto Superior Técnico
University of Lisbon
https://tecnico.ulisboa.pt/pt/
(2024 – Now)
Integrated Researcher
INESC-ID, Portugal
www.inesc-id.pt
(2024 – Now)
Technology Transfer Consultant
Microeletrônica 1A Project
Brazilian Ministry of Science, Technology & Innovation
MCTI, Brazil
(2023 – Now)
Postdoctoral Researcher
MICAS Labs, KU Leuven, Belgium
http://micas.be/
(2023 – 2024)
Intern – EDA training
Synopsys Academy
(2022 – 2022)
Postdoctoral Researcher
INESC-ID, University of Lisbon, Portugal
https://inesc-id.pt/
(2022 – 2023)
Research Team Leader
Universidade Federal do Rio Grande do Sul (UFRGS), Brazil
https://www.ufrgs.br/pgmicro/
(2021 – 2023)
Visiting Researcher
Chair of Embedded Systems – Prof. Jörg Henkel
Karlsruhe Institute of Technology (KIT), Germany
https://ces.itec.kit.edu/
(2019 – 2020)
Visiting Researcher
INESC-ID, University of Lisbon, Portugal
https://inesc-id.pt/
(2019)
PhD Researcher
Universidade Federal do Rio Grande do Sul (UFRGS), Brazil
https://www.ufrgs.br/pgmicro/
(2016 – 2021)
Education
PhD in Microelectronics – Summa Cum Laude
Universidade Federal do Rio Grande do Sul (UFRGS), Brazil
(2016 – 2021)
Electronics Engineering – 1st Ranked Grade (2015)
Universidade Federal de Pelotas (UFPel), Brazil
(2010 – 2015)
Technical High School on Electronics
Liberato Foundation, Brazil
(2006 – 2009)
Projects
CONVOLVE— Seamless design of Smart Edge Processors
https://convolve.eu/
Workpackage Leader
European Horizon
2023 – Now
BINGO— Outplaying the hardware lottery for embedded AI
https://research.kuleuven.be/EU/p/he/p1/erc/bingo
P.I. — Prof. Marian Verhelst
European Horizon
2023 – Now
ML-DSIV — Towards Approximate Edge Computing for Machine Learning & Digital Signal, Image, and Video Processing
P.I. — Prof. Bampi
Funding Agencies: CAPES (Brazil) and FCT (Portugal)
2021 – Now
ReACT — Reliability and Approximate Computing Techniques for Machine Learning & Video Processing
P.I. — Prof. Bampi
Funding Agencies: CAPES (Brazil) and DAAD (Germany)
2019 – 2021
ULP-LV – CMOS Design of Ultra-Low Power Receivers and Near-Threshold Digital Circuits
P.I. — Prof. Bampi
Funding Agency: FAPERGS (Brazil)
2019 – 2022
Ongoing Collaborations
- Deep Learning AI Automated HW Design
- Prof. Marian Verhelst, KU Leuven, Belgium
- Dr. Leandro Rocha, imec R&D, Belgium
- Approximate Computing (AxC)
- Prof. Sergio Bampi, UFRGS, Brazil
- Prof. Jorge Castro-Godínez, TEC, Costa Rica
- Emerging Technologies and AI HW Design
- Prof. Hussam Amrouch, TU Munich, Germany
Personal Awards
- Best Ph.D. Thesis Award 2022 – Brazilian Society of Microelectronics (SBMicro)
- Honor Mention of the Brazilian Ph.D. Thesis Award 2022 – CAPES Agency
(Most Important Brazilian Funding Agency) - Summa Cum Laude, Ph.D. in Microelectronics, UFRGS, 2021.
Title: Approximate and timing-speculative hardware design for high-performance and energy-efficient video processing.
Advisors: Dr. Sergio Bampi, Dr. Eduardo A.C. da Costa (UCPel) - Best Poster Award – IEEE CASS-RS Workshop 2021 (CASSW’2021)
- Honor Mention Poster Award – IEEE CASS-RS Workshop 2021 (CASSW’2021)
- Best Paper Award – South Symposium on Microelectronics 2020 (SIM’2020)
- Best Paper Award – South Symposium on Microelectronics 2018 (SIM’2018)
- Best Paper Award – South Symposium on Microelectronics 2017 (SIM’2017)
Academic Services
- Review Editor – Frontiers in Imaging – Imaging Coding Section
- Review Editor – Frontiers in Electronics – Integrated Circuits and VLSI Section
- General Chair – 11th IEEE CAS Society Workshop Rio Grande do Sul (CASSW-RS 2021), Website Link
- General Chair – 3rd IEEE Young Professionals (IYP 2021) 2021
- MLCAD 2024 – ACM/IEEE International Symposium on Machine Learning for CAD 2024
- tinyML Research Symposium 2024 – Burlingame, CA
- tinyML Research Symposium 2023 – Burlingame, CA
- VLSI-SoC 2022 – 30th IFIP/IEEE International Conference on Very Large Scale Integration, Patras – Greece
- CLEI 2022 – Latin American Computing Conference, Armenia, Colombia
- IEEE ISCAS, ICECS, MWSCAS, LASCAS, APCCAS, SBCCI
- Nature npj Unconventional Computing
- IEEE Transactions on Circuits and Systems I: Regular Papers (IEEE TCAS-I)
- IEEE Transactions on Circuits and Systems II: Express Briefs (IEEE TCAS-II)
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems (IEEE TVLSI)
- IEEE Transactions on Circuits and Systems for Video Technology (IEEE TCSVT)
- IEEE Transactions on Biomedical Circuits and Systems (IEEE TBioCAS)
- IEEE Transactions on Neural Systems and Rehabilitation Engineering (IEEE TSNRE)
- IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS)
- IEEE Transactions on Emerging Topics in Computing (IEEE TETC)
- Elsevier Microelectronics Reliability (Elsevier MR)
- Elsevier Microelectronics Journal (Elsevier MEJ)
- Elsevier Microprocessors and Microsystems (Elsevier MICPRO)
- IET Image Processing (IET IP)
- Springer Journal of Signal Processing Systems (Springer JSPS)
- Springer Journal of Real-time Image Processing (Springer JRTIP)
- Springer Analog Integrated Circuits and Signal Processing (Springer ALOG)
- Wiley International Journal of Circuit Theory and Applications (Wiley IJCTA)
- Journal of Integrated Circuits and Systems (JICS)
- Electronics and Telecommunications Research Institute Journal (ETRI)
- International Journal of Engineering, Science, and Technology (IJEST)
Special Session Organization
- G. Paim (UFRGS), Jorge Castro-Godínez (TEC, Costa Rica) , Sergio Bampi (UFRGS)
Approximate Computing for Energy-Efficient VLSI Circuits and Systems
in IEEE Latin America Symposium on Circuits and Systems, 2022, Chile. LASCAS’22 - G. Paim (UFRGS), Jorge Castro-Godínez (TEC, Costa Rica) , Sergio Bampi (UFRGS)
Approximate Computing Crossing Design Abstraction Levels: Algorithms, Architectures, & Logic Circuits IEEE International Symposium on Circuits and Systems, 2022, Austin. ISCAS’22
Book Chapter
- G. Paim, L. Soares, L. Rocha, B. Abreu, G. Santana, C. Diniz, E. Costa, S. Bampi.
Low-power circuit design techniques for high-resolution video coding
VLSI Architectures for Future Video Coding. 1ed.
in Institution of Engineering and Technology (IET), 2019, v. 1, p. 149-190.
IEEE Society Magazine Publications
- Alexandra Zimpeck, Guilherme Paim, Calebe Conceição, Ricardo Reis
IEEE YPW 2021—3rd IEEE Young Professionals Workshop [YPW 2021]
in IEEE Circuits and Systems Magazine - Alexandra Zimpeck, Guilherme Paim, Leandro M. G. Rocha, Ricardo Reis
Rio Grande do Sul Workshop [IEEE CASSW 2021—The 11th IEEE CASS]
in IEEE Circuits and Systems Magazine
Journal Publications
- Y. Arbeletche, G. Paim, B. Abreu, S. Almeida, E. Costa, P. Flores, S. Bampi
MAxPy: A Framework for Bridging Approximate Computing Circuits to its Applications
in IEEE Transactions on Circuits and Systems II: Express Briefs, 2023
MAxPy Framework Code: github.com/MAxPy-Project - L. Ribeiro, P. Costa, G. Paim, E. A. C. da Costa, S. Almeida, and S. Bampi
VLSI Architecture for Energy-Efficient and Accurate Pre-Processing Pan-Tompkins Design
in IEEE Transactions on Circuits and Systems II: Express Briefs, 2023
- G. Andrade, M. Silva, C. Schneider, G. Paim, Sergio Bampi, E. A. C. Costa, A. Zimpeck,
Robustness Analysis of 3-2 Adder Compressor Designed in 7nm FinFET Technology
in IEEE Transactions on Circuits and Systems II: Express Briefs, 2023 - B. A. de Abreu, Albi Mema, Simon Thomann, G. Paim, Paulo Flores, S. Bampi and H. Amrouch
Compact CMOS-Compatible Majority Gate using Body Biasing in FDSOI Technology
in IEEE Journal of Emerging and Selected Topics in Circuits and Systems, 2023
MAJinBoo Framework Code: github.com/Brunno815/MAJinBoo (Available Soon) - B. A. de Abreu, G. Paim, M. Grellert and S. Bampi
C2PAx: Complexity-Aware Constant Parameter Approximation for Energy-Efficient Tree-Based Machine Learning Accelerators
in IEEE Transactions on Circuits and Systems I: Regular, 2022
C2PAx Framework Code: github.com/Brunno815/C2PAx - M. Macedo, G. Paim, P. Costa, E. Costa, R. Soares, S. Bampi
AxPPA: Approximate Parallel Prefix Adders
in IEEE Transactions on Very Large Scale Integration Systems, 2023 - Pedro T. L. Pereira, G. Paim, E. Costa, S. Almeida, S. Bampi.
ReAdapt: A Reconfigurable Datapath for Runtime Energy-Quality Scalable Adaptive Filters
in IEEE Transactions on Circuits and Systems I: Regular, 2023 - P. T. L. Pereira, P. Costa, G. Ferreira, B. A. de Abreu, G. Paim, E. Costa, S. Bampi
Energy-Quality Scalable Design Space Exploration of Approximate FFT Hardware Architectures
in IEEE Transactions on Circuits and Systems I: Regular, 2022 - M. Macedo, P. Costa, E. Costa, S. Almeida, G. Paim, S. Bampi
Design of a Low Power and Robust VLSI Power Line Interference Canceler with Optimized Arithmetic Operators
in Analog Integrated Circuits and Signal Processing, 2022 - P. Costa, G. Paim, L. Rocha, E. Costa, S. Almeida, S. Bampi
Fixed-Point NLMS and IPNLMS VLSI Architectures for Accurate FECG and FHR Processing
in IEEE Transactions on Biomedical Circuits and Systems, 2021 - P. Pereira, G. Paim, P. Costa, S. Almeida, S. Bampi
Architectural Exploration for Energy-Efficient Fixed-Point Kalman Filter VLSI Design
in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2021 - G. Paim, H. Amrouch, L. Rocha, B. Abreu, E. Costa, S. Bampi, J. Henkel
Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers
in IEEE Transactions on Computers, 2022 - G. Paim; G. Zervakis; H. Amrouch, E. Costa, S. Bampi, J. Henkel
On the Resiliency of NCFET Circuits against Voltage Over-Scaling
in IEEE Transactions on Circuits and Systems I: Regular Papers, 2021 - G. Paim, Amrouch H., E. Costa, S. Bampi, J. Henkel
Bridging the Gap Between Voltage Over-Scaling and Joint Hardware Accelerator-Algorithm Closed-Loop
in IEEE Transactions on Circuits and Systems for Video Technology, 2022 - M. Rosa, H. Seidel, G. Paim, E. Costa, S. Almeida, S. Bampi
An Energy-Efficient Haar Wavelet Transform Architecture for Respiratory Signal Processing
in IEEE Transactions on Circuits and Systems II: Express Briefs, 2021 - H. Seidel, G. Paim, M. Rosa, E. Costa, S. Almeida, S. Bampi.
Approximate Pruned and Truncated Haar Discrete Wavelet Transform VLSI Hardware for Energy-Efficient ECG Signal Processing
in IEEE Transactions on Circuits and Systems I: Regular Papers, 2021 - G. Paim, L. Rocha, H. Amrouch, E. Costa, S. Bampi, J. Henkel
A Cross-layer Gate-Level-to-Application Co-simulation for Design Space Exploration of Approximate Circuits in HEVC Video Encoders
in IEEE Transactions on Circuits and Systems for Video Technology, 2020 - G. Paim, L. Rocha, G. Santana, L. Soares, E. Costa, S. Bampi
Power-, Area-, and Compression-Efficient Eight-Point Approximate 2-D Discrete Tchebichef Transform Hardware Design Combining Truncation Pruning and Efficient Transposition Buffers
in IEEE Transactions on Circuits and Systems I: Regular Papers, 2019 - B. Silveira, G. Paim, B. Abreu, M. Grellert, C. Diniz, E. Costa, S. Bampi
Power-Efficient SAD Hardware Architecture Using Adder Compressors for IME Design
in IEEE Transactions on Circuits and Systems I: Regular Papers, 2017 - M. Macedo, E. Costa, L. M. Rocha, G. Paim, S. Bampi
Energy-Efficient VLSI Squarer Unit with Optimized Radix-2m Multiplication Logic
in Springer Circuits, Systems, and Signal Processing, 2022 - G. Ferreira, G. Paim, L. Rocha, G. Santana, R. Neuenfeld, E. Costa, S. Bampi
Low-power fast Fourier transform hardware architecture combining a split-radix butterfly and efficient adder compressors
in IET Computers and Digital Techniques, 2021. - A. Rosa, P. Pereira, P. Costa, G. Paim, E. Costa, S. Bampi, S. Almeida
Exploring NLMS-based Adaptive Filter Hardware Architectures for Eliminating Power Line Interference in EEG Signals
in Springer Circuits, Systems, and Signal Processing, 2021 - Bianca Silveira; Guilherme Paim; Brunno Alves Abreu; Rafael Ferreira; Cláudio Machado Diniz; Eduardo Antônio César da Costa; Sergio Bampi
The 4-2 Fused Adder-Subtractor Compressor for Low-power Butterfly-based Hardware Architectures
in Springer Circuits, Systems and Signal Processing, 2021 - G. Paim, G. Santana, B. Abreu, L. Rocha, G. Grellert, E. Costa, S. Bampi
Exploring High-Order Adder Compressors for Reducing Power in Sum of Absolute Differences Architectures for Real-time UHD Video Encoding
in Springer Journal of Real-Time Image Processing, 2020 - V. Guidotti, G. Paim, L. Rocha, E. Costa, S. Almeida, S. Bampi
Power-Efficient Approximate Newton-Raphson Integer Divider Applied to NLMS Adaptive Filter for High-Quality Interference Cancelling
in Springer Circuits, Systems, and Signal Processing, 2020 - W. Penny, J. Goebel, G. Paim, M. Porto, L. Agostini, B. Zatt
High-throughput and power-efficient hardware design for a multiple video coding standard sample interpolator
in Springer Journal of Real-Time Image Processing, 2019 - G. Paim, G. Santana, L. Rocha, L. Soares, E. Costa, S. Bampi
Exploring approximations in 4- and 8- point DTT hardware architectures for low-power image compression
in Springer Analog Integrated Circuits and Signal Processing, 2018 - A. Sapper, G. Paim, E. Costa, S. Bampi
Exploring the CORDIC Algorithm and Clock-Gating for Power-Efficient Fast Fourier Transform Hardware Architectures
in Journal of Integrated Circuits and Systems, 2021 - H. Seidel, M. Rosa, G. Paim, E. Costa, S. Almeida, S. Bampi
Exploring Multi-Level Composition and Efficient SCM Schemes for an Energy-Efficient Wavelet Haar Architecture
in Journal of Integrated Circuits and Systems, 2021 - L., Rocha, G. Paim, G. Santana, E. Costa, S. Bampi
Framework-based Arithmetic Datapath Generation to Explore Parallel Binary Multipliers
in Journal of Integrated Circuits and Systems, 2020 - V. Lima, R. Wuerdig, G. Paim, L. Rocha, L. Rosa, F. Marques, V. Valduga, E. Costa, R. Soares, S. Bampi
Enhancing Side Channel Attack-Resistance of the STTL Combining Multi-Vt Transistors with Capacitance and Current Paths Counterbalancing
in Journal of Integrated Circuits and Systems, 2020 - B. Abreu, M. Grellert, G. Paim, L. Rocha, C. Diniz, E. Costa, S. Bampi
Exploring Absolute Differences Arithmetic Operators for Power- and Area-Efficient SAD Hardware Architectures
in Journal of Integrated Circuits and Systems, 2020 - T. Fontanari, G. Paim, L. Rocha, G. Santana, E. Costa, S. Bampi
A Fast Monolithic 8-2 Adder Compressor Circuit
in Journal of Integrated Circuits and Systems, 2019 - G. Paim, L. Rocha, G. Santana, L. B. Soares, E. Costa, S. Bampi
Using Pruning and Truncation for Power-Efficient 2-D Approximate Tchebichef Transform Hardware Architecture
in Journal of Integrated Circuits and Systems, 2018
Conference Publications
- J. Crols, G. Paim, S. Zhao, M. Verhelst
TreeRNG: Binary Tree Random Number Generator for Efficient Probabilistic AI Hardware Design
in IEEE Design, Automation & Test in Europe Conference and Exhibition, Sevilla, DATE’24 - T. Bücher, L. Alrahis, G. Paim, S. Bampi, O. Sinanoglu, H. Amrouch
AppGNN: Approximation-Aware Functional Reverse Engineering using Graph Neural Networks
in IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Diego – CA, ICCAD’ 22 - P. T. L. Pereira; G. Paim; P. Flores; E. Costa; S. Bampi
AxASRE: A Novel Approach to Approximate Adder Synthesis Results Estimation
IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, DSN-W’23 - P. T. L. Pereira; G. Paim; P. Flores; E. Costa; S. Bampi
Architectural Exploration for Energy-Efficient LMS and NLMS Adaptive Filters VLSI Design
IEEE Interregional NEWCAS Conference (NEWCAS) 2023, NEWCAS’23 - L. Rocha, G. Paim, D. Biswas, S. Bampi, C. V. Hoof, N. V. Helleputte
LSTM-only Network for Low-complexity HR Estimation from Wrist PPG
in 43rd IEEE Engineering in Medicine and Biology Society, 2021, Virtual. EMBC’2021 - M. Rosa, G. Paim, Jorge Castro-Godínez, E. Costa, R. Soares, S. Bampi
AxRSU: Approximate Radix-4 Squarer Unit
in IEEE International Symposium on Circuits and Systems, 2022, Austin-TX, ISCAS’22 - M. M. A. da Rosa, P. Costa, G. Paim, E. Costa, R. Soares and S. Bampi
An Energy-Efficient StEFCal VLSI Design with Approximate Squarer and Divider Units
in IEEE Latin America Symposium on Circuits and Systems, 2023, Quito, Ecuador. LASCAS’23 - P. Costa, M. Rosa, G. Paim, E. Costa, R. Soares, S. Bampi
An Efficient Exponential Unit Designed in VLSI CMOS with Custom Operators
in IEEE International Conference on Electronics, Circuits, and Systems, 2022, Glasgow, Scotland, ICECS’22 - M. Rosa, G. Paim, E. Costa, R. Soares, S. Bampi
Discrete Haar Wavelet Transform Hardware Design for Energy-Efficient Image Watermarking
in IEEE International Conference on Electronics, Circuits, and Systems, Glasgow, Scotland, ICECS’22 - P. Costa, M. Rosa, G. Paim, E. Costa, R. Soares, S. Bampi
An Efficient Exponential Unit Designed in VLSI CMOS with Custom Operators
in IEEE International Conference on Electronics, Circuits, and Systems, Glasgow, Scotland, ICECS’22 - P. Costa , P. T. L. Pereira, B. A. Abreu, G. Paim, E. Costa, S. Bampi
Improved Approximate Multipliers for Single-Precision Floating-Point Hardware Design
in IEEE Latin America Symposium on Circuits and Systems, 2022, Santiago, Chile. LASCAS’22 - B. A. Abreu, G. Paim, J. Castro-Godínez, M. Grellert, S. Bampi
On the Netlist Gate-level Pruning for Tree-based Machine Learning Accelerators
in IEEE Latin America Symposium on Circuits and Systems, 2022, Santiago, CL. LASCAS’22 - P. Costa, P. Pereira, G. Paim, G. Ferreira, E. Costa, S. Almeida, S. Bampi
Boosting the Efficiency of the Harmonics Elimination VLSI Architecture by Arithmetic Approximations
in IEEE International Conference on Electronics, Circuits, and Systems, 2021, Abu Dhabi. ICECS’21. - M. Rosa, P. Costa, E. Costa, S. Almeida, G. Paim, S. Bampi
A Robust and Power-Efficient VLSI Power Line Interference Canceling Design
in IEEE Symposium on Integrated Circuits and Systems Design, 2021, Virtual. SBCCI’21. - G. Ferreira, P. Pereira, G. Paim, E. Costa, S. Almeida, S. Bampi
A Power-Efficient FFT Hardware Architecture Exploiting Approximate Adders
in IEEE Latin America Symposium on Circuits and Systems, 2021, Arequipa. LASCAS’21 - P. Pereira, G. Paim, G. Ferreira, E. Costa, S. Almeida, S. Bampi
Exploring Approximate Adders for Power-Efficient Harmonics Elimination Hardware Architectures
in 12th IEEE Latin America Symposium on Circuits and Systems, 2021, Arequipa. LASCAS’21 - T. Fontanari, G. Paim, L. Rocha, P. Costa, E. Costa, S. Bampi
An Efficient N-bit 8-2 Adder Compressor with a Constant Internal Carry Propagation Delay
in 11th IEEE Latin America Symposium on Circuits and Systems, 2021, San José. LASCAS’20 - H. Seidel, M. Rosa, G. Paim, E. Costa, S. Almeida, S. Bampi
Energy-Efficient Haar Transform Architectures Using Efficient Addition Schemes
in 11th IEEE Latin America Symposium on Circuits and Systems, 2021, San José. LASCAS’20 - P. Costa, M. Weirich, G. Paim, E. Costa, S. Bampi
Optimizing Iterative-based Dividers for an Efficient Natural Logarithm Operator Design
in 11th IEEE Latin America Symposium on Circuits and Systems, 2021, San José. LASCAS’20 - L. Rocha, M. Rosa, G. Paim, E. Costa, S. Bampi
Improving the Partial Product Tree Compression on Signed Radix-2^m Parallel Multipliers
in 18th IEEE International New Circuits and Systems, 2020, Montreal. NEWCAS’20 - M. T. Leme, G. Paim, L. Rocha, P. Ucker, V. Lima, R. Soares, E. Costa, S. Bampi
Optimizing the Montgomery Modular Multiplier for a Power- and Area-Efficient Hardware Architecture
in IEEE 63rd Midwest Symposium on Circuits and Systems, 2020, Springfield. MWSCAS’20. - M. Rosa, G. Paim, L. Rocha, E. Costa, S. Bampi
Exploring Efficient Adder Compressors for Power-Efficient Sum of Squared Differences Design
in IEEE 27th International Conference on Electronics, Circuits, and Systems, 2020, Glasgow. ICECS’20. - A. Rosa, A., P. Ucker, G. Paim, E. Costa, S. Almeida, S. Bampi
Exploring NLMS and IPNLMS Adaptive Filtering VLSI Hardware Architectures for Robust EEG Signal Artifacts Elimination
in IEEE 27th International Conference on Electronics, Circuits, and Systems, 2020, Glasgow. ICECS’20. - P. Ucker, G. Paim, L. Rocha, E. Costa, S. Bampi
An Efficient NLMS-based VLSI Architecture for Robust FECG Extraction and FHR Processing
in IEEE 27th International Conference on Electronics, Circuits, and Systems, 2020, Glasgow. ICECS’20. - M. Rosa, G. Paim, L. Rocha, E. Costa, S. Bampi
The Radix-2^m Squared Multiplier
in IEEE 27th International Conference on Electronics Circuits and Systems, 2020, Glasgow. ICECS’20. - V. Lima, G. Paim, L. Rocha, L. Rosa, F. Marques, E. Costa, V. Valduga, R. Soares, S. Bampi.
Maximizing Side Channel Attack-Resistance and Energy-Efficiency of the STTL Combining Multi-Vt Transistors with Current and Capacitance Balancing
in IEEE International Symposium on Circuits and Systems, 2019, Sapporo. ISCAS’19. - G. Paim, L. Rocha, E. Costa, S. Bampi
Maximizing the Power-Efficiency of the Approximate Pruned Modified Rounded DCT Exploiting Approximate Adder Compressors
in IEEE International New Circuits and Systems Conference, 2019, Munich. NEWCAS’19. - B. Abreu, M. Grellert, G. Paim, T. Fontanari, L. Rocha, E. Costa, S. Bampi
Exploring Motion Vector Cost with Partial Distortion Elimination in Sum of Absolute Differences for HEVC Integer Motion Estimation
in IEEE International New Circuits and Systems Conference, 2019, Munich. NEWCAS’19. - R. Ferreira, G. Paim, C. Diniz, E. Costa, S. Bampi
HEVC Interpolation Filter Architecture Using Hybrid Encoding Arithmetic Operators
in IEEE International Midwest Symposium on Circuits and Systems, 2019, Dallas. MWSCAS’19. - P. Pereira, G. Paim, P. Ucker, E. Costa, S. Almeida, S. Bampi
Exploring Architectural Solutions for an Energy-Efficient Kalman Filter Gain Realization
in IEEE International Conference on Electronics, Circuits, and Systems, 2019, Genova. ICECS’19. - T. Sequeira, G. Santana, G. Paim, L. Rocha, B. Abreu, E. Costa, S. Bampi
Low-Power HEVC 8-Point 2-D Discrete Cosine Transform Hardware Using Adder Compressors
in IEEE International New Circuits and Systems Conference, 2018, Montreal. NEWCAS’18. - B. Abreu, G. Santana, M. Grellert, G. Paim, L. Rocha, E. Costa, S. Bampi
Exploiting Partial Distortion Elimination in the Sum of Absolute Differences for Energy-Efficient HEVC Integer Motion Estimation
in Symposium on Integrated Circuits and Systems Design, 2018, Bento Gonçalves. SBCCI’18. - M. Weirich, G. Paim,E. Costa, S. Bampi
A Fixed-Point Natural Logarithm Approximation Hardware Design Using Taylor Series
in IEEE New Generation of Circuits and Systems, 2018, Malta. NGCAS’18. - G. Paim, L. Soares, R. Ferreira, E. Costa, S. Bampi
Pruning and approximation of coefficients for power-efficient 2-D Discrete Tchebichef Transform
in IEEE 15th International New Circuits and Systems Conference, 2017, Strasbourg, NEWCAS’17. - R. Dornelles, G. Paim, M. Fonseca, E. Costa, S. Bampi
A Power-Efficient 4-2 Adder Compressor Topology
in IEEE 15th International New Circuits and Systems Conference, 2017, Strasbourg, NEWCAS’17. - B. Silveira, R. Ferreira, G. Paim, E. Costa, C. Diniz
Low Power SATD Architecture Employing Multiple Sizes Hadamard Transforms and Adder Compressors
in IEEE 15th International New Circuits and Systems Conference, 2017, Strasbourg, NEWCAS’17. - G. Paim, S. Rafael, L. Rocha, E. Costa, T. Giacomelli, S. Bampi
A power-predictive environment for fast and power-aware ASIC-based FIR filter design
in IEEE 24th International Conference on Electronics, Circuits and Systems, 2017, Batumi, ICECS’17. - L. Rocha, G. Paim, G. Santana, B. Abreu, R. Ferreira, E. Costa, S. Bampi
Physical implementation of an ASIC-oriented SRAM-based viterbi decoder
in IEEE 24th International Conference on Electronics, Circuits and Systems, 2017, Batumi, ICECS’17. - B. Silveira, B. Abreu, G. Paim, M. Grellert, R. Ferreira, C. Diniz, E. Costa, S. Bampi
Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding
in IEEE 24th International Conference on Electronics, Circuits and Systems, 2017, Batumi, ICECS’17. - L. Rocha, G. Paim, R. Ferreira, E. Costa, S. Bampi
Framework-based arithmetic core generation to explore ASIC-based parallel binary multipliers
in IEEE 24th International Conference on Electronics, Circuits and Systems, 2017, Batumi, ICECS’17. - B. Abreu, G. Paim, M. Grellert, B. Silveira, C. Diniz, E. Costa, S. Bampi
Exploiting absolute arithmetic for power-efficient sum of absolute differences
in IEEE 24th International Conference on Electronics, Circuits and Systems, 2017, Batumi, ICECS’17. - G. Paim, P. Marques, E. Costa, S. Almeida, S. Bampi
Improved goldschmidt algorithm for fast and energy-efficient fixed-point divider
in IEEE 24th International Conference on Electronics, Circuits and Systems, 2017, Batumi, ICECS’17. - G. Santana, G. Paim, L. Rocha, R. Neuenfeld, M. Fonseca, E. Costa, S. Bampi
Using efficient adder compressors with a split-radix butterfly hardware architecture for low-power IoT smart sensors
in IEEE 24th International Conference on Electronics, Circuits and Systems, 2017, Batumi, ICECS’17. - T. Schiavon, G. Paim, M. Fonseca, E. Costa, S. Almeida
Exploiting adder compressors for power-efficient 2-D approximate DCT realization
in IEEE 7th Latin American Symposium on Circuits & Systems, Florianópolis, LASCAS’16. - J. Goebel, G. Paim, L. Agostini, B. Zatt, M. Porto
An HEVC multi-size DCT hardware with constant throughput and supporting heterogeneous CUs
in IEEE International Symposium on Circuits and Systems, 2016, Montréal, ISCAS’16 - G. Paim, E. Costa
Using adder compressors for power-efficient 2-D approximate Discrete Tchebichef Transform
in IEEE 14th International New Circuits and Systems Conference, 2016, Vancouver, NEWCAS’16 - G. Paim, W. Penny, J. Goebel, V. Afonso, A. Susin, M. Porto, B. Zatt, L. Agostini
An efficient sub-sample interpolator hardware for VP9-10 standards
in IEEE International Conference on Image Processing, 2016, Phoenix. ICIP’16 - G. Paim, J. Goebel, W. Penny, B. Zatt, M. Porto, L. Agostini
High-throughput and memory-aware hardware of a sub-pixel interpolator for multiple video coding standards
in IEEE International Conference on Image Processing, 2016, Phoenix. ICIP’16 - B. Silveira, G. Paim, C. Diniz, E. Costa
Power-efficient sum of absolute differences architecture using adder compressors
in IEEE 23th International Conference on Electronics, Circuits and Systems, 2016, Monte Carlo, ICECS’16. - G. Paim, L. Soares, E. Costa, S. Bampi
A Power-Efficient Imprecise Radix-4 Multiplier applied to High Resolution Audio Processing
in IEEE 23th International Conference on Electronics, Circuits and Systems, 2016, Monte Carlo, ICECS’16. - H. Maich, G. Paim, V. Afonso, L. Agostini, B. Zatt, M. Porto
A multi-standard interpolation filter for motion compensated prediction on high definition videos
in IEEE 6th Latin American Symposium on Circuits & Systems, 2015, Montevideo. LASCAS’15. - H. Maich, G. Paim, V. Afoinso, L. Agostini, B. Zatt, M. Porto
A multi-standard interpolation hardware solution for H.264 and HEVC
in IEEE International Conference on Image Processing, 2016, Quebéc. ICIP’15 - W. Penny, G. Paim, M. Porto, L. Agostini, B. Zatt
Real-Time Architecture for HEVC Motion Compensation Sample Interpolator for UHD Videos
in IEEE Symposium on Integrated Circuits and Systems Design, 2015, Salvador. SBCCI’15. - G. Paim, M. Fonseca, E. Costa, S. Almeida
Power Efficient 2-D Rounded Cosine Transform with Adder Compressors for Image Compression
in IEEE 23th International Conference on Electronics, Circuits and Systems, 2015, Cairo, ICECS’15.
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